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 STS5PF30L
P-channel 30V - 0.045 - 5A SO-8 STripFETTM Power MOSFET
General features
Type STS5PF30L

VDSS 30V
RDS(on) <0.055
ID 5A
Conduction losses reduced Switching losses reduced Low threshold drive Standard outline for easy automated surface mount assembly
S0-8
Description
This Power MOSFET is the latest development of STMicroelectronics unique "single feature sizeTM" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
Internal schematic diagram
Applications
Switching application
Order code
Part number STS5PF30L Marking S5PF30L Package SO-8 Packaging Tape & reel
February 2007
Rev 4
1/12
www.st.com 12
Contents
STS5PF30L
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................. 6
3 4 5
Test circuit
................................................ 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STS5PF30L
Electrical ratings
1
Electrical ratings
Table 1.
Symbol VDS VGS ID ID IDM
(1)
Absolute maximum ratings
Parameter Drain-source voltage (vgs = 0) Gate- source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C dual operating Junction temperature Storage temperature range Value 30 16 5 4 20 2.5 -55 to 150 150 Unit V V A A A W C C
PTOT TJ Tstg
1. Pulse width limited by safe operating area
Note:
For the p-channel Power MOSFET actual polarity of voltages and current has to be reversed Thermal data
(1)
Table 2.
Rthj-a TL
Thermal resistance junction-ambient Max
50 300
C/W C
Maximum lead temperature for soldering purpose
1. Mounted on FR-4 board (t10sec)
3/12
Electrical characteristics
STS5PF30L
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 3.
Symbol V(BR)DSS
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage Drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250 A, VGS = 0 VDS = Max rating VDS=Max rating, TC=125C VGS = 16V VDS = VGS, ID = 250A VGS = 10V, ID = 2.5A VGS = 4.5V, ID = 2.5A 1 1.6 0.045 0.065 Min. 30 1 10 100 2.5 0.055 0.075 Typ. Max. Unit V A A nA V
IDSS
IGSS VGS(th) RDS(on)
Table 4.
Symbol gfs(1) Ciss Coss Crss Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge VDS = 25V, f = 1 MHz, VGS = 0 Test conditions VDS= 15V, ID =2.5A Min. Typ. 10 1350 490 130 VDD = 24V, ID = 5A, VGS = 5V (see Figure 14) 12.5 5 3 16 Max. Unit S pF pF pF nC nC nC
1. Pulsed: Pulse duration = 300 s, duty cycle 1.5.
4/12
STS5PF30L Table 5.
Symbol td(on) tr td(off) tf
Electrical characteristics Switching times
Parameter Turn-on delay time Rise time Test conditions VDD=15 V, ID=2.5A, RG=4.7, VGS= 4.5V (see Figure 13) VDD=15 V, ID=2.5A, RG=4.7, VGS= 4.5V (see Figure 13) Min. Typ. 25 35 125 35 Max. Unit ns ns ns ns
Turn-off Delay Time Fall Time
Table 6.
Symbol ISD ISDM VSD
(1) (2)
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 5A, VGS = 0 ISD = 5A, VDD = 15V di/dt = 100A/s, Tj = 150C (see Figure 15) 45 36 1.6 Test conditions Min Typ. Max 5 20 1.2 Unit A A V ns nC A
trr Qrr IRRM
1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5%
5/12
Electrical characteristics
STS5PF30L
2.1
Figure 1.
Electrical characteristics (curves)
Safe operating area Figure 2. Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
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STS5PF30L Figure 7. Gate charge vs gate-source voltage Figure 8.
Electrical characteristics Capacitance variations
Figure 9.
Normalized gate threshold voltage vs temperature
Figure 10. Normalized on resistance vs temperature
Figure 11. Source-drain diode forward characteristics
Figure 12. Normalized BVDSS vs temperature
7/12
Test circuit
STS5PF30L
3
Test circuit
Figure 14. Gate charge test circuit
Figure 13. Switching times test circuit for resistive load
Figure 15. Test circuit for diode recovery behavior
8/12
STS5PF30L
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
9/12
Package mechanical data
STS5PF30L
SO-8 MECHANICAL DATA
DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
10/12
STS5PF30L
Revision history
5
Revision history
Table 7.
Date 06-Feb-2007
Revision history
Revision 4 Changes The document has been reformatted
11/12
STS5PF30L
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